D3T-2008

 

Call for Paper (pdf)

ITC 2008

Final Program

Organizing/Program Committee

Registration

Hotel/Travel

The IEEE International Workshop on

Defect and Data Driven Testing (D3T-2008)

(Formerly known as Defect-Based Testing Workshop (DBT))

Visit http://d3t.tttc-events.org/

 

October 30 - 31, 2008 Santa Clara Convention Center, Santa Clara, CA

Will be held in conjunction with ITC Test Week (ITC-2008)

 

Submission Deadline: August 26, 2008

Notification of Acceptance: September 19, 2008

Camera Ready Paper: September 26, 2008

Previous Events

DBT 2007

DBT 2006

DBT 2005

DBT 2004

DBT 2000

 

 

 

Theme: Date Driven Testing (DDT)


Technology scaling is introducing yield as main issue to design and test engineers. Various types of defects are presenting unique challenges to the yield enhancement community. New test date based methodologies are required to detect, monitor, and comprehend the various defect mechanisms at sub-50nm technology nodes and their impact on yield. Data-driven testing (DDT) has been in practice for a number of years and often used for yield learning and analysis. It is now gaining attention more than ever in adaptive test. DDT uses data to reduce defect levels, increase reliability, and to diagnose and solve yield problems. DDT can provide feedbacks on which tests to add/remove, or test subsets (e.g. reduced MINVDD test sets). It can also be utilized for improving quality of logic test patterns (e.g. small delay defect, defect-based) vs. outlier analysis tests (e.g. MINVDD, IDDQ). However, test data has not been easily accessible by smaller companies and researchers in academia. These issues will be discussed in this year’s D3T workshop.

 

The IEEE International Workshop on Defect and Data-Driven Testing (D3T 2008) is aimed at addressing these issues and others related to this year’s theme “Data-Driven Testing (DDT)”. Paper presentations on topics related to the workshop’s theme and to those given below are expected to generate active discussion on the challenges that must be met to ensure high IC quality through the end of the decade.

 

·  Outlier Identification

·  Data-Driven Testing (DDT)

·  Test Data Analysis

·  Yield Learning and Analysis Using DDT

·  Adaptive Test

·  Data-Mining Methods for Test Data Processing

·  Low Voltage Testing

·  Elevated Voltage Testing and Stress Testing

·  Reliability and Yield

·  Nanometer Test Challenges

·  Defect Coverage & Metrics

·  Mixed Current/Voltage Testing

·  Economics of Defect Based Testing

·  Fault Localization & Diagnosis

·  Noise and Crosstalk Testing

·  Transition and Delay Fault Testing


To present at the workshop, submit a postscript or Acrobat (PDF) version of an extended abstract of at least 1000 words via E-mail to the Program Chair by Sep. 1, 2008. Each submission should include full name and address of each author, affiliation, telephone number, FAX and Email address. The presenter should also be identified. Camera-ready papers for inclusion in the digest of papers will be due on Oct. 6, 2008. Presentations on cutting edge test technology, innovative test ideas, and industrial practices and experience are welcome. Proposals for Embedded Tutorials, Debates, Panel Discussions or “Spot-Light” presentations describing industrial experiences are also invited.

 

Technical Program Submissions:

Mohammad Tehranipoor

University of Connecticut

E-mail: tehrani@engr.uconn.edu

Visit our www site at: http://dbt.tttc-events.org/

 

General Information:

Rob Aitken

ARM, USA

E-mail: rob.aitken@arm.com